The serial communications interface (SCI) is the universal asynchronous receiver/transmitter (UART) peripheral on 68HC05 devices.
A single 8-bit register from which received data is read and to which data for transmission is written is shared by the receiver and transmitter sections of the SCI. Separate bits in SCI control register 1 (SCCR1) provide access to the ninth data bit when it is used for parity of address mark purposes.
Two prescaler bits allow the baud rate generator to run at the internal MCU clock frequency divided by 1, 3, 4, or 13. Three additional selection bits permit division of the prescaler output by 1, 2, 4, 8, 16, 32, 64, or 128. At internal MCU clock frequencies of 2 MHz and 4 MHz, the highest standard baud rates available are 9600 and 19200 baud, respectively.
Flags in the SCI status register (SCSR) report when the transmit data register is empty (TDRE), when a transmission is complete (TC), when the receive data register is full (RDRF), when the reciver goes idle (IDLE), and when receiver over-run (OR), framing (FE), and noise (NF) errors occur. Interrupts may be independently enabled for the TDRE, TC, and IDLE conditions. When enabled, the receiver interrupt is triggered by both RDRF and OR.