Addressing Modes — Summary
Several different addressing modes are available to support the data requirements of different 68HC05 instructions.
Indexed, 16-Bit Offset (IX2)
Indexed, 8-Bit Offset (IX1)
Bit Test and Branch (BTB)
Notes:
The simple availability of powerful instructions does not alone comprise a good microcontroller architecture. Flexible addressing modes are also needed so that these instructions can efficiently access the different types of data that may be distributed in memory.
In addition to its 65 basic instructions, the 68HC05 has eight addressing modes that determine the source and/or destination of the data upon which these instructions operate.
For practical reasons, no single 68HC05 instruction can use all eight addressing modes. Branches, for example, are relative operations, so it would make no sense for them to use any addressing mode other than relative.
On the other hand, those instructions that must be capable of operating on any memory location and the accumulator or the index register should have the widest selection of addressing modes. Thus, these instructions, like ADD, CMP, and LDA, can use all modes except inherent and relative.