Addressing Modes — IX2
When indexed addressing with 16-bit offsets is used, target addresses are calculated by taking the unsigned sum of the contents of the index register and the 16-bit offset.
Example instructions include loads and stores…
…arithmetic and combinatorial logic operations…
…CMP, CPX, and BIT for register comparison and memory testing…
And JMP and JSR for program flow changes…
The same group of instructions that can use extended addressing is also the only group of instructions that can use indexed addressing with 16-bit offsets.
Notes:
Instructions that use indexed addressing with 16-bit offsets can read from or write to any location in the 68HC05 memory map. These instructions always require three bytes of storage.
Target addresses are formed by taking the unsigned sum of the 16-bit offset and the contents of the index register and always range from $0000 to $FFFF. Thus, if X = $41, the instruction STA $FFE0,X will write to address $0021.
Indexed addressing with 16-bit offsets is especially useful for accessing tabular or string data stored in on-chip ROM which, on most 68HC05 devices, resides primarily above $0100.