Bit Test and Branch — BTB
The bit test and branch (BTB) addressing mode is used only by the BRSET and BRCLR instructions. BRSET and BRCLR take a direct address and have eight opcodes to denote each bit in a byte, just like BSET and BCLR.
Consider the following line of code…
In this example, 0 £ n £ 7 and denotes one of the eight bits in a byte. This assembles to one of the BRSET opcodes (calculated at $00 + 2n), the direct address $00, and an offset to TARGET relative to the address of the instruction that follows BRSET.
BRCLR instructions are formed the same way…
As above, 0 £ n £ 7 and denotes one of the eight bits in a byte. This assembles to one of the BRCLR opcodes (calculated at $01 + 2n) , the direct address $00, and an offset to TARGET relative to the address of the instruction that follows BRCLR.
Notes:
Like the bit set and bit clear instructions, the branch on bit set and branch on bit clear instructions also have a unique addressing mode. This bit test and branch (BTB) addressing mode is best described as a cross between the bit set and clear (BSC) and relative (REL) addressing modes. The source code format for these instructions is:
BRSET/BRCLR bit_number, direct_address, offset
Although each instruction has three operands, an assembled BRSET or BRCLR instruction consists of an opcode, a direct address, and a signed two’s complement offset to the target address. Each bit that can be tested has its own BRSET and BRCLR opcodes.
Target addresses for bit test and branch instructions are calculated as…
New Program Counter = Address of BRCLR/BRSET Opcode + 3 + Signed Offset
Like a regular branch, the target address for BRSET and BRCLR is offset from the address of the next instruction. This makes the smallest practical negative offset for branch on bit set/clear -3 ($FD). These instructions execute in five clock cycles.