FR 500 Development Environment

DESCRIPTION

Integrated Development Environment The integrated development environments that include worldwide familiar tool-chain and real-time operating systems are provided for FR500. VLIW Compiler Technology The compiler decides the instruction’s parallelability in the VLIW processor. This ability is directly reflected in the processor’s processing performance. FUJITSU applied its VLIW and vector processing optimization technology acquired in its supercomputers to the FR-V compiler, which plays the ultimate role in VLIW architecture. Instruction Parallelism Applying predicated and non-excepting instructions, instruction parallelism is improved by the global scheduling. Determinant Processing Determinant processing is improved by using SIMD instructions automatically. Code Efficiency Unnecessary nop instructions are removed using the packing flags to achieve compact size.

FEATURES

SOFTUNE / REALOS (FUJITSU) GNUPro / eCos (Cygnus Solutions) Tornado II / VxWorks (Wind River Systems) OPENplus / G-OS (GAIO TECHNOLOGY)