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Minimum execution time: 0.5µs/8 MHz oscillation
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F²MC-8L family CPU core
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Instruction set optimized for controllers
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Multiplication and division instructions
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16-bit arithmetic operations
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Test and branch instructions
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Bit manipulation instructions, etc.
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Low-voltage operation (when an A/D converter is not used)
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Low current consumption (compatible with dual-clock system)
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High-voltage ports on chip
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Five types of timers
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8-bit PWM timer (also usable as a reload timer)
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12-bit MPG timer (also usable as a PPG output, PWM output, and reload timer)
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8/16-bit timer (also usable as two 8-bit timers)
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21-bit time-base timer
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One serial interface: Swichable transfer direction allows communication with various equipment.
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10-bit A/D converter: 12 channels(Successive approximation type)
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External interrupt: 2 channels: Two channels are independent and capable of wake-up from low-power consumption modes. (Rising edge,falling edge/both edges selectability)
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-0.3 V to +7.0 V can be applied to INT1 (N-ch open-drain)
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Low-power consumption modes:
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Stop mode (Oscillation stops to minimize the current consumption.)
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Sleep mode (The CPU stops to reduce the current consumption to approx. 1/3 of normal.)
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Subclock mode
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Watch mode
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Reset output and power-on reset selectability
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