 |
F²MC-8L family CPU core
|
|
Dual-clock control system
|
|
Maximum memory space: 64 Kbytes
|
|
Minimum execution time: 0.4µs/10 MHz
|
|
Interrupt processing time: 3.6µs/10 MHz
|
|
I/O ports: max. 64 channels
|
|
21-bit time-base counter
|
|
8-bit PWM timers: 2 channels (A maximum of 4 channels can be used for output.)
|
|
8/16-bit timer/counter: 4 channels (16 bits * 2 channels)
|
|
8-bit serial I/O: 1 channel
|
|
8-bit A/D converter: 8 channels
|
|
External interrupt 1: Four independent channels with edge detection function
|
|
External interrupt 2 (wake-up function): Twelve "L" level-interrupt channels
|
|
Watch prescaler
|
|
LCD controller/driver: 16 to 32 segments * 2 to 4 commons
|
|
Power-on reset function
|
|
Low-power consumption modes (subclock mode, watch mode, sleep mode, and stop mode)
|
|
SQFP-100 and QFP-100 packages
|
