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High speed processing at low voltage: Minimum execution time: 0.5µs/8.0 MHz
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F²MC-8L family CPU core
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Instruction set optimized for controllers
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Multiplication and division instructions
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16-bit arithmetic operations
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Test and branch instructions
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Bit manipulation instructions, etc.
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8-bit PWM timer: 2 channels (also usable as a reload timer)
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16-bit input capture: 2 channels / 16-bit output compare: 2 channels
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20-bit time-base counter
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UART: 1 channel (with asynchronous transfer mode and 8-bit synchronous serial mode)
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8-bit serial interface: 1 channel (LSB first/MSB first selectability)
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10-bit A/D converter: 8 channels
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LCD controller/driver: 28 segments x 4 commons (max. 112 pixels)
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Low-voltage detection reset
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Watchdog timer reset
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External interrupt: Four channels are independent and capable of wake-up from the low-power consumption mode (with edge detection function)
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Buzzer output/clock output
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Low-power consumption modes:
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Stop mode (The software stops oscillation to minimize the current consumption.)
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Sleep mode (The CPU stops to reduce current consumption to approx. 1/3 of normal.)
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Hardware standby mode (The pin input stops oscillation.)
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