MB90470 Series

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DESCRIPTION

The FUJITSU MB90470 Series is a 16-bit general-purpose microcontroller designed for consumer products and other process control applications requiring high-speed and real-time processing. The F²MC-16LX CPU core instruction set retains the AT architecture of the F²MC *1 family, with additional instructions for use with high-level languages, expanded addressing mode, enhanced multiply and divide instructions, and full bit processing. Also included is a built-in 32-bit accumulator for long-word processing. Peripheral resources built into the MB90470 series include 8/16-bit PPG, expanded I/O serial interface, UART, 10-bit A/D converter, 16-bit input-output timer, 8/16-bit up-counter, PWC timer, I²C *2 interface, DTP/external interrupt, chip select, and 16-bit reload timer. Note: *1 : F²MC is an abbreviation for FUJITSU Flexible Microcontroller, and is a registered trademark of FUJITSU, Ltd. *2 : I²C license : This product includes licensing of Philips I²C patents if used by the customer in an I²C system subject to the I²C standard specifications established by Philips.

FEATURES

Clocks Minimum instruction execution time : 50.0 ns at 5 MHz base oscillation with 4 x multiplier (internal operation at 20 MHz/3.3 V ± 0.3 V) 62.5 ns at 4 MHz base oscillation with 4 x multiplier (internal operation at 16 MHz/3.0 V ± 0.3 V) Uses PLL clock multiplier. Maximum memory size: 16 Mbytes Instruction set optimized for control applications Handles bit, byte, word, long-word data 23 standard addressing modes 32-bit accumulator for enhanced high-precision calculation Signed multiply-divide and expanded RETI instructions Instruction system compatible with high-level language (C) multitasking System stack pointer Instruction set correlation and barrel shift instructions Non-multi bus or multi-bus compatible Improved execution speed: 4-byte queue Powerful interrupt functions: 8 external interrupt functions with 8-level programmable priority Data transfer functions (µDMAC):16 channels maximum Built-in ROM Flash versions : 256 KB Mask ROM versions : 128 KB/256 KB Built-in RAM: 10 KB/16 KB General purpose ports: 84 ports maximum(includes 16 ports with input pull-up resistance setting, 14 ports with output open drain setting) A/D converter RC sequential comparator type, 8 channels 10-bit resolution, conversion time 4.65 µs (at 20 MHz operation) I²C interface: 1 channel µPG: 1 channel UART: 1 channel I/O expansion serial interface (SIO): 2 channels 8/16-bit up/down timer: 1 channel 16-bit PWC: 3 channels (including 2-channel input comparison function) 16-bit reload timer: 1 channel 16-bit input-output timer: 2-channel input capture, 6-channel output compare, 1-channel free running timer 2 built-in clock generator systems Low power modes: Stop, sleep, CPU intermittent mode, clock mode, etc. Package options: QFP100/LQFP100 Process: CMOS technology Supply voltage: Can operate on 3 V single supply systems (with 5 V interface provided by some pins with 3/5 V dual-supply capability)

DOCUMENTATION

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Datasheet V1-00 111 pages, 1244 KB Hardware Manual DRAFTV1-3 418 pages, 2058 KB PFV package 0.5mm LQFP 1 page, 104 KB PF package 0.65mm QFP 1 page, 109 KB Click here to look for more recent documents!