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Minimum execution time: 83.33 ns (at machine clock frequency of 12 MHz)
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Dual-clock control systems
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PLL clock control
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Instruction set optimized for controller applications

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Variety of data types bit, byte, word, long-word
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Expanded addressing modes: 23 types
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High coding efficiency
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Improvement of high-precision arithmetic operations through use of 32-bit accumulator
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Instruction set supports high-level language (C language) and multitasking

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Inclusion of system stack pointer
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Enhanced pointer-indirect instructions
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Barrel shift instruction
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Improved execution speed: 4-byte instruction queue
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8-level, 32-factor powerful interrupt service functions
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Automatic transfer function independent of CPU (EI²OS)
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General-purpose ports: max. 59 channels
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18-bit timebase timer/15-bit watch timer
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Watchdog timer function
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CPU intermittent operation function
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Various standby modes
Peripheral blocks
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ROM:

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32 Kbytes (MB90622A)
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48 Kbytes (MB90623A)
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One-time PROM: 48 Kbytes (MB90P623A)
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RAM:

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1.64 Kbytes (MB90622A)
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2 Kbytes (MB90623A/P623A)
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General-purpose ports: max. 59 channels
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Dual-clock control system
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PLL clock multiplication control system
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UART: 1 channel can be used for either asynchronous transfer or synchronous transfer with clock
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Extended serial I/O interface: 1 channel can be used for 8-bit synchronous transfer
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A/D converter (8/10-bit resolution): 4 channels
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PPG (Programable pluse generator): 2 channels
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16-bit reload timer: 3 channels
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16-bit free run timer with compare register: 2 channels
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LCD controller/driver 32 segments, 4 commons
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External interrupts: 8 channels
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18-bit timebase timer
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15-bit watch timer
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Watchdog timer function
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CPU intermittent operation function
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Standby mode
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Watch mode
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Sleep mode
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Stop mode
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