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Minimum execution time: 62.5 ns/4 MHz oscillation (Uses PLL clock multiplication), maximum multiplier = 4
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Instruction set optimized for controller applications
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Object code compatibility with F²MC-16(H)
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Wide range of data types (bit, byte, word, and long word)
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Improved instruction cycles provide increased speed
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Additional addressing modes: 23 modes
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High code efficiency
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Access mothods (bank access, linear pointer)
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High precision operations are enhanced by use of a 32-bit accumulator
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Extended intelligent I/O service (access area extended to 64 KB)
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Maximum memory space: 16 MB
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Enhanced high level language (C) and multitasking support instructions
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Use of a system stack pointer
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Enhanced pointer indirect instructions
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Barrel shift instructions
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Improved execution speed: Four byte instruction queue
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Powerful interrupt function
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Automatic data transfer function that does not use instruction (IIOS)
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Internal peripherals
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ROM: 32 Kbytes (MB90632A), 64 Kbytes (MB90634A)
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One-time PROM: 64 Kbytes (MB90P634A)
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RAM: 1 Kbytes (MB90632A), 2 Kbytes (MB90634A), 3 Kbytes (MB90P634A)
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General-purpose ports: 82 ports max.
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10-bit A/D converter (RC successive approximation): eight channels (10-bit resolution, conversion time = 5.2µs at 4 MHz with a x 4 multiplier)
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8-bit D/A converter two channels (8-bit resolution)
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UART (can also be used as a serial port) two channels
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I/O expansion serial interface two channels
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8/16-bit PPG (can be set to either 8-bit x two channels or 16-bit x one channel) one channel
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16-bit I/O timer one channel (two channels input capture, four channels output compare, and one channel free-run timer)
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Clock output generator
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Timebase counter/watchdog timer (18-bit)
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Low-power consumption modes
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The device types are classified by the initial value of the oscillation stabilization delay time.
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Oscillation stabilization delay time initial value = 2.05µs: MB90630A series (MB90632A/634A/P634A)
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Package: LQFP-100 (QFP-100 planned)
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CMOS technology
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