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Minimum execution time: 58.8 ns at 17 MHz source oscillation PLL clock multiplier method
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Instruction set optimized for controller applications
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Wide variety of data types (bit/byte/word/long-word)
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23 addressing modes
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High coding efficiency
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32-bit accumulator for higher precision computation
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Strengthened instructions for high-level language (C) and multitasking
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System stack pointer
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Strengthened pointer indirect instructions
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Barrel shift instructions
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Improved execution speed: 4-byte queuing
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Powerful 8-level, 24-source interrupt function
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CPU-independent automatic transfer function
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The address and data buses can either be non-multiplexed or multiplexed
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General-purpose ports: Up to 48 channels (in 8-bit non-multiplex mode)
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Up to 56 channels (in multiplex mode)
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Up to 75 channels (in single-chip mode)
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UART (SCI): 2 channels can be used for asynchronous transfer or as serial interface with clock (I/O extended serial inter-face)
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PPG (programmable pulse generator):2 channels
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16-bit reload timer: 5 channels
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Chip select output: 8 channels
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External interrupts: 8 channels
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18-bit timebase timer: Watchdog timer function
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PLL clock multiplier function
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CPU intermittent operation function
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Selection of standby modes
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Package: SQFP-100/QFP-100
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CMOS process technology
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