MB90650A Series
Related Documentation
More..
Feature Table
Table
DESCRIPTION

The MB90650A series are 16-bit microcontrollers designed for high speed real-time processing in consumer product applications such as controlling celluar phones, CD-ROMs, or VTRs. Based on the F²MC-16L CPU core(F²MC stands for FUJITSU Flexible Microcontroller), an F²MC-16L is used as the CPU. This CPU includes high-level language-support instructions and robust task switching instructions, and additional addressing modes. In order to reduce the consumption current, dual-clock (main/sub) is used. Furthermore, low consumption power supply is achieved by using stop mode, sleep mode, watch mode, pseudo-watch mode, CPU intermittent operation mode. Microcontrollers in this series have built-in peripheral resources including 10-bit A/D converter, 8-bit D/A converter, UART, 8/16-bit PPG, 8/16-bit up/down counter/timer, I²C interface(Purchase of Fujitsu I²C components conveys a license under the Philips I²C Patent Rights to use these components in an I²C system, provided that the system conforms to the I²C Standard Specification as defined by Philips) , 8/16-bit I/O timer (input capture, output compare, and 16-bit free-run timer).

FEATURES


Minimum execution time: 62.5 ns/4 MHz oscillation (Uses PLL clock multiplication) maximum multiplier = 4

Instruction set optimized for controller applications

Object code compatibility with F²MC-16(H)

Wide range of data types (bit, byte, word, and long word)

Improved instruction cycles provide increased speed

Additional addressing modes: 23 modes

High code efficiency

Access methods (bank access, linear pointer)

High precision operations are enhanced by use of a 32-bit accumulator

Extended intelligent I/O service (access area extended to 64 Kbytes)

Maximum memory space: 16 Mbytes

Enhanced high level language (C) and multitasking support instructions

Use of a system stack pointer

Enhanced pointer indirect instructions

Barrel shift instructions

Improved execution speed: Four byte instruction queue

Powerful interrupt function

Automatic data transfer function that does not use instruction (extended I²OS)


DOCUMENTATION

Note: The use of Adobe's Acrobat Reader 4.0 is recommended to have all download and browsing features available for pdf files.
Datasheet Datasheet V3-00
120 pages, 1695 KB
Hardware Manual Hardware Manual V3-00
512 pages, 8809 KB
Package Drawing PFV package 0.5mm LQFP
1 page, 104 KB
Package Drawing PF package 0.65mm QFP
1 page, 109 KB
Package Drawing CR package Xmm PGA
1 page, 47 KB


Click here to look
for more recent documents!