Home  Product Overview    68HC05    68HC08    68HC11    68HC12    68HC16    68300    M·CORE    MPC500  Product Catalog    68HC05    68HC08    68HC11    Selector Guides    · Microcontroller    · Development Tool  Technical Support    Development         Tools    Documentation    Errata Sheets    FAQs    Third Party    Tutorial  Contact Us    How to buy    For add'l support  Other    MCU Site Map    Web Links	XC68HC705X32 Programming Change The following information is regarding a change on the XC68HC705X32 Important information: Possible requirements to change the programming algorithim of XC68HC705X32. The existing production maskset D59J has been replaced by a new mask set G47V. On maskset D59J, the oscillator divide ratio in Bootloader mode, and during the power-on reset delay, depends on the state of the CANE pin (pin 26): CANE = 1 : f_bus = f_osc / 10 CANE = 0 : f_bus = f_osc / 2 The above divide ratios apply to the power-on reset delay and to Bootloader mode. With CANE = 0 and f_osc = 4Mhz, a serial baud rate of 9600 is realised. With the latest maskset, G47V, the oscillator divide ratio (and hence the serial baud rate) is independant of the state of the CANE pin: f_bus = f_osc / 10 (power-on reset delay) f_bus = f_osc / 2 (Bootloader mode) Thus if CANE = 0, the serial baud rate with the previous maskset is the same for the new mask set (although the power-on reset delay is increased). Alternatively, if CANE = 1, the serial baud rate will be different, requiring either a change in baud rate for the communication terminal, or a change in oscillator frequency for the programmer board. D59J G47V f_osc = 4Mhz 1920 9600 baud (CANE = 1) f_osc = 20Mhz 9600 48000 baud (CANE = 1) This change does not affect the HC705B32, since Divide by 2 is default in bootloader mode.
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