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68HC05BD3:
Microcontroller
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The
MC68HC05BD3 HCMOS microcontroller is a member of the M68HC05
Family of low-cost single-chip microcontrollers. This 8-bit
microcontroller contains an on-chip oscillator, CPU, RAM,
ROM, parallel I/O capability with pins programmable as input
or output, M-Bus serial interface system (I2C), Pulse Width
Modulator, Multi-Function Timer, and Sync Signal Processor.
There features make it particularly suitable as a multi-sync
monitor MCU.
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68HC05BD3
Features
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- 68HC05 Core
- 128 Bytes of RAM for HC05BD2
- 3.75K-Bytes of User ROM for HC05BD2
- 40-pin DIP and 42-pin SDIP packages
- 26 Bidirectional I/O lines: 14 dedicated and 12 multiplexed
I/O lines. 4 of the 14 dedicated I/O lines and 6 of the
12 multiplexed I/O lines have max. +12V or +5V open-drain
output buffers
- 16 x 8-bit PWM channels: Two 8-bit PWM channels have
+12V open-drain outputs: 8 dedicated 8-bit PWM channels
have +5V open-drain output options
- 6-bit ADC with 4 selectable input channels
- Multi-Function Timer (MFT) with Periodic Interrupt
- Sync Signal Processor module for processing horizontal,
vertical, composite, and SOG SYNC signals; frequency counting;
polarity detection; polarity controlled HSYNO and VSYNO
or extracted VSYNC outputs, and CLAMP pulse output
- DDC12AB module contains DDC1 hardware and multi-master
I 2 C hardware for DDC2AB protocol
- Software maskable Edge-Sensitive or Edge and Level-Sensitive
External Interrupt
- COP watchdog Reset
- Power-On Reset
- Power
Saving WAIT Mode; STOP Mode not implemented
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68HC05BD3
Parametrics
ROM
(KBytes)
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RAM
(Bytes)
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Timer
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I/O
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Serial
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PWM
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Operating Voltage
(V)
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Bus Frequency
(Max)
(MHz)
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3.75
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128
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MFT
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24
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12C
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16-CH
8-Bit
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5.0
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2.1
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68HC05BD3
Documentation
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68HC05BD3
Design Tools and Data
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68HC05BD3
Orderable Parts
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Orderable Part ID |
Package
Info |
Status |
Remarks |
| MC68HC05BD3B |
Shrink
Dual In-Line Package (SDIP) |
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0
to +70 C. Customers must submit their mask ROM code and a
specific orderable part number will be issued |
| MC68HC05BD3P |
Plastic
Dual In-Line Package (PDIP) |
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0
to +70 C. Customers must submit their mask ROM code and a
specific orderable part number will be issued |
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