Home  Product Overview    68HC05    68HC08    68HC11    68HC12    68HC16    68300    M·CORE    MPC500  Product Catalog    68HC05    68HC08    68HC11    Selector Guides    · Microcontroller    · Development Tool  Technical Support    Development         Tools    Documentation    Errata Sheets    FAQs    Third Party    Tutorial  Contact Us    How to buy    For add'l support  Other    MCU Site Map    Web Links	68HC705F32: Microcontroller   The MC68HC705F32 is a member of the M68HC05 family of HCMOS microcomputers. Its memory configuration comprises 32K bytes of EPROM, 920 bytes of RAM and 256 bytes of EEPROM. The on-board features of this device make it particularly suitable for use in highly integrated telephone handsets; the timer and DTMF generator allow for both pulse and tone dialling and, in addition to telephone set-up parameters and features such as last number redial, the EEPROM can typically store up to 12 telephone numbers of 20 digits, even after power has been removed from the circuit. Other features of the device include the keyboard interrupt facility, which allows a direct interface to a telephone keypad, the LCD circuit, which can drive up to 160 segments of an LCD display, and the A/D converter which could be used, for example, as a volume control for a telephone in hands-free mode. Page Contents Features Parametrics Documentation Design Tools Orderable Parts 68HC705F32 Features Fully static design featuring the industry-standard M68HC05 CPU core 32512 bytes of user EPROM, plus 16 bytes for vectors 240 bytes of bootloader ROM 920 bytes of RAM plus 20 bytes of LCD RAM 256 bytes of user EEPROM DTMF/melody generator 16-bit programmable timer with four input captures and four output compares (the outputs of two of the output compares are used internally and do not have external connections) 15 stage multipurpose core timer with timer overflow, real time interrupt and COP watchdog LCD driver with 4 backplanes and 40 frontplanes 8-channel, 8-bit analog-to-digital (A/D) converter Power saving STOP and WAIT modes I/O lines 100 QFP configuration &endash; total of 80 I/O pins configured as: 16 dedicated bidirectional I/O 64 shared with peripherals 80 QFP configuration &endash; total of 69 I/O pins configured as: 16 dedicated bidirectional I/O 53 shared with peripherals Keyboard interrupt facility on eight of the I/O lines, with high or low voltage level interrupt triggers Hardware interrupt with edge or edge-and-level sensitive interrupt trigger SCI and SPI subsystems On-chip oscillators Three PWM channels Two selectable bus frequencies 32kHz independent clock system Power-on and power-off resets; low voltage detection circuitry (EEPROM) Available in 100-pin QFP and 80-pin QFP Note: The 80-pin version is only a bond option. Pins PE4, PD7&endash;PD0, PC4, PC5 are shared with module functions which cannot work on the 80-pin package. These modules and their corresponding pin functions should not be enabled.   [top] 68HC705F32 Parametrics RAM (Bytes) EPROM/OTP (Bytes) EEPROM (Bytes) Timer I/O Serial A/D PWM Operating Voltage (V) Bus Frequency (Max) (MHz) 920 32K 256 16-Bit, 4I/C, 4O/C, MFT, RTI Up to 80 SCI SPI 8-CH 8-Bit 3-CH 8-Bit 3.0, 5.0 2.1   [top] 68HC705F32 Documentation Document ID Document Title MC68HC05F32/D 68HC705F32, 68HC05F32 Technical Data Book 68HC05APPNOTES Table of 68HC05 Applications Notes   [top] 68HC705F32 Design Tools and Data ID Name M68MMPFB0508 MMEVS Modular Evaluation System M68MMDS0508 MMDS0508 Emulator System   [top] 68HC705F32 Orderable Parts Orderable Part ID Package Info Status Remarks MC68HC705F32PU 100-Pin Quad Flat Pack (QFP) 0 to +70 C MC68HC705F32FU 80-Pin Quad Flat Pack (QFP) 0 to +70 C MC68HC705F32CPU 100-Pin Quad Flat Pack (QFP) -40 to +85 C MC68HC705F32CFU 80-Pin Quad Flat Pack (QFP) -40 to +85 C   [top]
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