SCAS015B - JUNE 1987 - REVISED APRIL 1996
Copyright © 1996, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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This 8-bit latch features 3-state outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight latches of the 74ACT11373 are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When the enable is taken low, the Q outputs are latched at the levels that were set up at the D inputs.
A buffered output-enable
input can be used to place the eight outputs in either a normal logic
state (high or low logic levels) or a high-impedance state. In the
high-impedance state, the outputs neither load nor drive the bus
lines significantly. The high-impendance third state and increased
drive provide the capability to drive the bus lines in a
bus-organized system without need for interface or pullup components.
does not affect
the internal operations of the latches. Old data can be retained or
new data can be entered while the outputs are off.
The 74ACT11373 is characterized for operation from -40°C to 85°C.