74ACT11181
ARITHMETIC LOGIC UNIT/FUNCTION GENERATOR

SCAS086 - D3200, OCTOBER 1989 - REVISED APRIL 1993

Copyright © 1992, Texas Instruments Incorporated

features

• Inputs Are TTL-Voltage Compatible
• New Flow-Through Architecture Optimizes PCB Layout
• Center-Pin V_CC and GND Configurations Minimize High-Speed Switching Noise
• EPIC^TM (Enhanced-Performance Implanted CMOS) 1-m Process
• 500-mA Typical Latch-Up Immunity at 125°C
• Full Look Ahead for High-Speed Operations on Long Words
• Arithmetic Operating Modes:
• Addition
• Subtraction
• Shift Operand A One Position
• Magnitude Comparison
• Plus Twelve Other Arithmetic Operations
• Logic Function Modes:
• Exclusive-OR
• Comparator
• AND, NAND, OR, NOR

  EPIC is a trademark of Texas Instruments Incorporated.

description

The 74ACT11181 is an arithmetic logic unit (ALU)/function generator that has a complexity of 75 equivalent gates on a monolithic chip. These circuits perform 16 binary arithmetic operations on two 4-bit words as shown in Tables 1 and 2. These operations are selected by the four function-select lines (S0, S1, S2, S3) and include addition, subtraction, decrement, and straight transfer. When performing arithmetic manipulations, the internal carries must be enabled by applying a low-level voltage to the mode control input (M). A full carry look-ahead scheme is made available in these devices for fast, simultaneous carry generation by means of two cascade outputs G\ and P\ for the four bits in the package. When used in conjunction with the 'ACT11882 full carry look-ahead circuits, high-speed arithmetic operations can be performed. The method of cascading 'ACT11882 circuits with these ALUs to provide multilevel full-carry look-ahead operation is illustrated under signal designations.

If high speed is not important, a ripple-carry input (C_n) and a ripple-carry output (C_{n + 4}) are available. However, the ripple-carry delay has also been minimized so that arithmetic manipulations for small word lengths can be performed without external circuitry.

The 74ACT11181 will accommodate active-high or active-low data if the pin designations are interpreted as follows:

Subtraction is accomplished by 1's complement addition where the 1's complement of the subtrahend is generated internally. The resultant output is A - B - 1, which requires an end-around or forced carry to provide A - B.

The 74ACT11181 can also be used as a comparator. The A = B output is internally decoded from the function outputs (F0, F1, F2, F3) so that when two words of equal magnitude are applied at the A and B inputs, it will assume a high level to indicate equality (A = B). When performing this comparison, the ALU must be in the subtract mode with C_n = H. The A = B output is open drain so that it can be wired-AND connected to give a comparison for more than four bits. The carry output (C_{n + 4}) can also be used to supply relative magnitude information. Again, the ALU must be placed in the subtract mode by placing the function select inputs S3, S2, S1, S0 at L, H, H, L, respectively.

These circuits have been designed not only to incorporate all of the designer's requirements for arithmetic operation but also to provide 16 possible functions of two Boolean variables without using external circuitry. These logic functions are selected using the four function-select inputs (S0, S1, S2, S3) with the mode-control input (M) at a high level to disable the internal carry. The 16 logic functions are detailed in Tables 1 and 2 and include exclusive-OR, NAND, AND, NOR, and OR functions.