SN74ACT2236
1024 × 9 × 2
ASYNCHRONOUS BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY

SCAS149A - APRIL 1990 - REVISED SEPTEMBER 1995

features

• Independent Asynchronous Inputs and Outputs
• Low-Power Advanced CMOS Technology
• Bidirectional
• 1024 Words by 9 Bits Each
• Programmable Almost-Full/Almost-Empty Flag
• Empty, Full, and Half-Full Flags
• Access Times of 25 ns With a 50-pF Load
• Data Rates From 0 to 50 MHz
• Fall-Through Times of 23 ns Max
• High Output Drive for Direct Bus Interface
• 3-State Outputs
• Available in 44-Pin PLCC (FN) Package

   

description

A FIFO memory is a storage device that allows data to be written into and read from its array at independent data rates. The SN74ACT2236 is arranged as two 1024 by 9-bit FIFOs for high speed and fast access times. It processes data at rates from 0 to 50 MHz with access times of 25 ns in a bit-parallel format.

The SN74ACT2236 consists of bus-transceiver circuits, two 1024 × 9 FIFOs, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal FIFO memories. Enable and DIR inputs are provided to control the transceiver functions. The select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. Figure 1 shows the five fundamental bus-management functions that can be performed with the SN74ACT2236.

The SN74ACT2236 is characterized for operation from 0°C to 70°C.

For more information on this device family, see the application report 1K 9 2 Asynchronous FIFOs SN74ACT2235 and SN74ACT2236 in the 1996 High-Performance FIFO Memories Designer's Handbook, literature number SCAA012A.