54ACT16833, 74ACT16833
DUAL 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS

SCAS166A - JUNE 1990 - REVISED APRIL 1996

features

• Members of the Texas Instruments Widebus^TM Family
• Inputs Are TTL-Voltage Compatible
• Parity Error Flag With Parity Generator/Checker
• Register for Storage of the Parity Error Flag
• Flow-Through Architecture Optimizes PCB Layout
• Distributed V_CC and GND Pin Configuration Minimizes High-Speed Switching Noise
• EPIC^TM (Enhanced-Performance Implanted CMOS) 1-m Process
• 500-mA Typical Latch-Up Immunity at 125°C
• Package Options Include 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

description

The 'ACT16833 consist of two noninverting 8-bit to 9-bit parity bus transceivers and are designed for communication between data buses. For each transceiver, when data is transmitted from the A bus to the B bus, an odd-parity bit is generated and output on the parity I/O pin (1PARITY or 2PARITY). When data is transmitted from the B bus to the A bus, 1PARITY or 2PARITY is configured as an input and combined with the B-input data to generate an active-low error flag if odd parity is not detected.

The error (1 or 2) output is configured as an open-collector output. The B-to-A parity error flag is clocked into 1 or 2 on the low-to-high transition of the clock (1CLK or 2CLK) input. 1 or 2 is cleared (set high) by taking the clear (1 or 2) input low.

The output-enable ( and ) inputs can be used to disable the device so that the buses are effectively isolated. When both and are low, data is transferred from the A bus to the B bus and inverted parity is generated. Inverted parity is a forced error condition that gives the designer more system diagnostic capability.

The 74ACT16833 is packaged in TI's shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The 54ACT16833 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16833 is characterized for operation from -40°C to 85°C.