74ACT11867
SYNCHRONOUS 8-BIT UP/DOWN BINARY COUNTER
WITH ASYNCHRONOUS CLEAR

SCAS178 - D3990, DECEMBER 1991 - REVISED APRIL 1993

features

• Inputs Are TTL-Voltage Compatible
• Asynchronous Clear
• Fully Independent Clock Circuit Simplifies Use
• Flow-Through Architecture Optimizes PCB Layout
• Center-Pin V_CC and GND Configurations Minimize High-Speed Switching Noise
• EPIC^TM (Enhanced-Performance Implanted CMOS) 1-m Process
• 500-mA Typical Latch-Up Immunity at 125°C

  EPIC is a trademark of Texas Instruments Incorporated.

description

The 74ACT11867 is a synchronous presettable binary counter featuring an internal carry look-ahead for cascading in high-speed counting applications. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable inputs and internal gating. This mode of operation helps eliminate the output counting spikes that are normally associated with asynchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the eight flip-flops on the rising (positive-going) edge of the clock waveform.

The counters are fully programmable; that is, the outputs may each be preset to either logic level. The load-mode circuitry allows parallel loading of the cascaded counters. As loading is synchronous, selecting the load mode disables the counter and causes the outputs to agree with the data inputs after the next clock rising edge.

The carry look-ahead circuitry is provided for cascading counters for n-bit synchronous applications without additional gating. This is done with two count-enable inputs and a carry output. Both count-enable ( and ) inputs must be low to count. The direction of the count is determined by the levels of the select (S0 and S1) inputs (see the function table). Input is fed forward to enable the ripple-carry () output. then produces a low-level pulse while the count is zero (all outputs low) when counting down or 255 during counting up (all outputs high). This low-level overflow carry pulse can be used to enable successive cascaded stages. Transitions at and are allowed regardless of the level of the clock input.

These counters feature a fully independent clock circuit. Whenever and/or is taken high, either goes high or remains high. The function of the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the stable setup and hold times.

The 74ACT11867 is characterized for operation from -40°C to 85°C.