74AC11373
OCTAL TRANSPARENT D-TYPE LATCH
WITH 3-STATE OUTPUTS

SCAS213A - MAY 1987 - REVISED APRIL 1996

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

features

• Eight Latches in a Single Package
• 3-State Bus-Driving True Outputs
• Full Parallel Access for Loading
• Buffered Control Inputs
• Flow-Through Architecture Optimizes PCB Layout
• Center-Pin V_CC and GND Configurations Minimize High-Speed Switching Noise
• EPIC^TM (Enhanced-Performance Implanted CMOS) 1-m Process
• 500-mA Typical Latch-Up Immunity at 125°C
• Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-mil DIPs (NT)

EPIC is a trademark of Texas Instruments Incorporated.

description

This 8-bit latch features 3-state outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight latches of the 74AC11373 are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.

can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance third state and increased drive provide the capability to drive bus lines in a bus-organized system without need for interface or pullup components.

does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are off.

The 74AC11373 is characterized for operation from -40°C to 85°C.