SCAS232 - AUGUST 1992 - REVISED APRIL 1993
EPIC is a trademark of Texas Instruments Incorporated.
The 74ACT11657 contains eight noninverting buffers with 3-state outputs and an 8-bit parity generator/checker and is intended for bus-oriented applications.
The transmit/receive (T/R\) input determines the direction of data
flow through the bidirectional transceivers. When T/R\ is high, data
flows from the A port to the B port (transmit mode); when T/R\ is
low, data flows from the B port to the A port (receive mode). When
the output-enable
input is high,
both the A and B ports are in the high-impedance state.
Odd or even parity is selected by a logic high or low level,
respectively, on the ODD
input. PARITY carries the parity bit value; it is an
output from the parity generator/checker in the transmit mode and an
input to the parity generator/checker in the receive mode.
In the transmit mode, after the A bus is polled to determine the
number of high bits, PARITY is set to the logic level that maintains
the parity sense selected by the level at the ODD
input. For example, if ODD
is low (even parity selected) and
there are five high bits on the A bus, then PARITY is set to the
logic high level so that an even number of the nine total bits (eight
A-bus bits plus parity bit) are high.
In the receive mode, after the B bus is polled to determine the
number of high bits, the
output logic level indicates whether or not the data to be received
exhibits the correct parity sense. For example, if ODD
is high (odd parity selected),
PARITY is high, and there are three high bits on the B bus, then
is low, indicating a parity error.
The 74ACT11657 is characterized for operation from -40°C to 85°C.