SN74ALVC16600
18-BIT UNIVERSAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS

SCAS263A - JANUARY 1993 - REVISED MARCH 1994


 

features

 

EPIC, UBT, and Widebus are trademarks of Texas Instruments Incorporated.

description

This 18-bit universal bus transceiver is designed for 2.7-V to 3.6-V VCC operation.

The SN74ALVC16600 combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.

Data flow in each direction is controlled by output-enable ( and ), latch-enable (LEAB and LEBA), and clock (and ) inputs. The clock can be controlled by the clock-enable ( and ) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if is held at a high or low logic level. If LEAB is low, the A-bus data is stored in the latch/flip-flop on the high-to-low transition of . Output enable is active low. When is low, the outputs are active. When is high, the outputs are in the high-impedance state.

Data flow for B to A is similar to that of A to B but uses , LEBA, , and .

The SN74ALVC16600 is available in TI's shrink small-outline (DL) and thin shrink small-outline (DGG) packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The SN74ALVC16600 is characterized for operation from -40°C to 85°C.