SCAS274 - JANUARY 1993 - REVISED MARCH 1994
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
This 20-bit bus-interface D-type latch is designed for 2.7-V to 3.6-V VCC operation.
The SN74ALVC16841 features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, unidirectional bus drivers, and working registers.
The SN74ALVC16841 can be used as two 10-bit latches or one 20-bit latch. The twenty latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs. While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit latch follow the D inputs. When LE is taken low, the Q outputs are latched at the levels that were set up at the D inputs.
A buffered output-enable (1
or 2
) input can be
used to place the outputs of the corresponding 10-bit latch in either
a normal logic state (high or low) or a high-impedance state. In the
high-impedance state, the outputs neither load nor drive the bus
lines significantly.
The output-enable (
)
input does not affect the internal operation of the latches. Old data
can be retained or new data can be entered while the outputs are in
the high-impedance state.
The SN74ALVC16841 is available in TI's shrink small-outline (DL) and thin shrink small-outline (DGG) packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.
The SN74ALVC16841 is characterized for operation from -40°C to 85°C.