SN74ALVC16843
18-BIT BUS-INTERFACE D-TYPE LATCH
WITH 3-STATE OUTPUTS

SCAS275 - JANUARY 1993 - REVISED MARCH 1994


features

 

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

description

This 18-bit bus-interface D-type latch is designed for 2.7-V to 3.6-V VCC operation.

The SN74ALVC16843 features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, unidirectional bus drivers, and working registers.

The SN74ALVC16843 can be used as two 9-bit latches or one 18-bit latch. The eighteen latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs.

A buffered output-enable () input can be used to place the nine outputs in either a normal logic state (high or low levels) or a high-impedance state. The outputs are also in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered down. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

The output-enable () input does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN74ALVC16843 is available in TI's shrink small-outline (DL) and thin shrink small-outline (DGG) packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The SN74ALVC16843 is characterized for operation from -40°C to 85°C.