SCAS302C - JANUARY 1993 - REVISED JANUARY 1997
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This octal bus transceiver and register is designed for 2.7-V to 3.6-V VCC operation.
The SN74LVC646A consists of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the SN74LVC646A.
Output-enable (
) and
direction-control (DIR) inputs control the transceiver functions. In
the transceiver mode, data present at the high-impedance port can be
stored in either register or in both.
The select-control (SAB and SBA) inputs can multiplex stored and
real-time (transparent mode) data. DIR determines which bus receives
data when
is low. In the
isolation mode (
high), A data
can be stored in one register and B data can be stored in the other
register.
When an output function is disabled, the input function is still enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
To ensure the high-impedance state during power up or power down,
should be tied
to VCC through a pullup resistor; the minimum value of the
resistor is determined by the current-sinking capability of the
driver.
The SN74LVC646A is characterized for operation from -40°C to 85°C.