SCAS308C - MARCH 1993 - REVISED JANUARY 1997
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This 9-bit bus-interface D-type latch is designed for 2.7-V to 3.6-V VCC operation.
The SN74LVC843A is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The nine latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs.
A buffered output-enable (
) input can be used to place the nine outputs in either
a normal logic state (high or low logic levels) or a high-impedance
state. The outputs are also in the high-impedance state during
power-up and power-down conditions. The outputs remain in the
high-impedance state while the device is powered down. In the
high-impedance state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and increased drive
provide the capability to drive bus lines without interface or pullup
components.
does not affect
the internal operations of the latch. Previously stored data can be
retained or new data can be entered while the outputs are in the
high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
To ensure the high-impedance state during power up or power down,
should be tied
to VCC through a pullup resistor; the minimum value of the
resistor is determined by the current-sinking capability of the
driver.
The SN74LVC843A is characterized for operation from -40°C to 85°C.