CDC337
CLOCK DRIVER
WITH 3-STATE OUTPUTS

SCAS330A - DECEMBER 1990 - REVISED NOVEMBER 1995

features

• Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications
• TTL-Compatible Inputs and CMOS-Compatible Outputs
• Distributes One Clock Input to Eight Outputs
  • Four Same-Frequency Outputs
  • Four Half-Frequency Outputs
• Distributed V_CC and Ground Pins Reduce Switching Noise
• High-Drive Outputs (-48-mA I_OH, 48-mA I_OL)
• State-of-the-Art EPIC-IIB^TM BiCMOS Design Significantly Reduces Power Dissipation
• Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages

  EPIC-IIB is a trademark of Texas Instruments Incorporated.

description

The CDC337 is a high-performance, low-skew clock driver. It is specifically designed for applications requiring synchronized output signals at both the clock frequency and one-half the clock frequency. The four Y outputs switch in phase and at the same frequency as the clock (CLK) input. The four Q outputs switch at one-half the frequency of CLK.

When the output-enable () input is low and the clear () input is high, the Y outputs follow CLK and the Q outputs toggle on low-to-high transitions at CLK. Taking low asynchronously resets the Q outputs to the low level. When is high, the outputs are in the high-impedance state.

The CDC337 is characterized for operation from -40°C to 85°C.