SN74LVC16544
16-BIT REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS

SCAS351 - MARCH 1994

features

• Member of the Texas Instruments Widebus^TM Family
• EPIC ^TM (Enhanced-Performance Implanted CMOS) Submicron Process
• Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot) > 2 V at V_CC = 3.3 V, T_A = 25°C
• Bus-Hold On Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

description

This 16-bit registered transceiver is designed for low-voltage (3.3 V) V_CC operation.

The SN74LVC16544 can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch-enable ( or ) and output-enable ( or ) inputs are provided for each register to permit independent control in either direction of data flow.

The A-to-B enable () input must be low in order to enter data from A or to output data from B. If is low and is low, the A-to-B latches are transparent; a subsequent low-to-high transition of puts the A latches in the storage mode. With and both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar but requires using the , , and inputs.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74LVC16544 is characterized for operation from -40°C to 85°C.