SN54LVT243, SN74LVT243
3.3-V ABT QUADRUPLE BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS

SCAS353 - MARCH 1994

features

• State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low-Static Power Dissipation
• Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)
• Supports Unregulated Battery Operation Down to 2.7 V
• Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC = 3.3 V, T_A = 25°C
• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
• Bus-Hold Data Inputs Eliminate the Need for External Pullup Resistors
• Supports Live Insertion
• Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), and Ceramic DIPs (J)

description

These quadruple bus transceivers are designed specifically for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The ´LVT243 is designed for asynchronous communications between data buses. The control-function implementation allows for maximum flexibility in timing. The device allows data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic levels at the output-enable (OEBA and ) inputs. The output-enable inputs can be used to disable the device so that the buses are effectively isolated.

The dual-enable configuration gives the quadruple bus transceivers the capability to store data by simultaneous enabling of OEBA and . Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (eight in all) remain at their states. The 4-bit codes appearing on the two sets of buses will be identical for the ´LVT243.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

To ensure the high-impedance state during power up or power down, should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

The SN74LVT243 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54LVT243 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LVT243 is characterized for operation from -40°C to 85°C.