SCAS497 - D3442, MARCH 1990 - REVISED APRIL 1993
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These positive-edge-triggered flip-flops implement D-type flip-flop logic with a direct clear input.
Data at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output.
The 74AC11273 is characterized for operation from -40°C to 85°C.