CDC3244
3.3-V ABT OCTAL CLOCK DRIVER
WITH 3-STATE OUTPUTS

SCAS500 - APRIL 1995

features

• State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low-Static Power Dissipation
• 750-ps Maximum Output Skew Between All Outputs
• Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)
• Typical V_OLP (Output Ground Bounce) 0.8 V at V_CC = 3.3 V, T_A = 25°C
• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
• Bus-Hold Data Inputs Eliminate the Need for External Pullup Resistors
• Supports Live Insertion
• Packaged in Shrink Small-Outline Package (SSOP)

description

The CDC3244 is designed specifically for low-voltage 3.3-V V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment. The CDC3244 provides a low-cost solution in applications that require skews of less than 750 ps.

The CDC3244 is organized as two 4-bit line drivers with separate output-enable () inputs. When is low, the device passes data from the A inputs to the Y outputs. When is high, the outputs are in the high-impedance state.

Active bus-hold circuitry holds unused or floating data inputs at a valid logic level.

To ensure the high-impedance state during power up or power down, should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The CDC3244 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.