CDC244
OCTAL CLOCK DRIVER
WITH 3-STATE OUTPUTS

SCAS501A - APRIL 1995 - REVISED NOVEMBER 1995

features

• State-of-the-Art EPIC-IIB^TM BiCMOS Design Significantly Reduces Power Dissipation
• 750-ps Maximum Output Skew Between All Outputs
• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
• Typical V_OLP (Output Ground Bounce) < 1 V at V_CC = 5 V, T_A = 25°C
• High-Drive Outputs (-32-mA I_OH, 64-mA I_OL)
• Packaged in Shrink Small-Outline Package

   

description

This octal clock driver is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The CDC244 provides a low-cost solution in applications requiring skews of less than 500 ps.

The CDC244 is organized as two 4-bit buffers/line drivers with separate output-enable () inputs. When is low, the device passes data from the A inputs to the Y outputs. When is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The CDC244 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The CDC244 is characterized for operation from -40°C to 85°C.