SCBS021D - FEBRUARY 1989 - REVISED NOVEMBER 1993
This 10-bit bus-interface flip-flop features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.
The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs will be true to the data (D) inputs.
A buffered output-enable (
) input can be used to place the ten outputs in either a
normal logic state (high or low) or a high-impedance state. In the
high-impedance state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and increased drive
provide the capability to drive bus lines without need for interface
or pullup components.
The output enable (
)
does not affect the internal operation of the flip-flops. Old data
can be retained or new data can be entered while the outputs are in
the high-impedance state.
The SN74BCT29821 is characterized for operation from 0°C to 70°C.