SN54BCT29841, SN74BCT29841
10-BIT BUS-INTERFACE D-TYPE LATCHES
WITH 3-STATE OUTPUTS

SCBS024C - MARCH 1989 - REVISED NOVEMBER 1993

features

• State-of-the-Art BiCMOS Design Significantly Reduces I_CCZ
• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Power-Up High-Impedance State
• Provides Extra Bus-Driving Latches Necessary For Wider Address/Data Paths or Buses With Parity
• Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic and Ceramic 300-mil DIPs (JT, NT)

description

These 10-bit bus-interface latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.

The ten latches of the ´BCT29841 are transparent D-type latches. When the latch-enable (LE) input is high, the Q outputs will follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels that were set up at the D inputs.

A buffered output-enable () input can be used to place the nine outputs in either a normal logic state (high or low level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

The output enable () does not affect the internal operation of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN54BCT29841 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT29841 is characterized for operation from 0°C to 70°C.