SN54ABT845, SN74ABT845
OCTAL BUS INTERFACE D-TYPE LATCHES
WITH 3-STATE OUTPUTS

SCBS169 - FEBRUARY 1991-REVISED OCTOBER 1992


 


features

description

The 'ABT845 9-bit latch is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight latches are transparent D-type latches. The device has non inverting data (D) inputs and provides true data at its outputs.

Since clear () and preset () are independent of the clock, taking the input low causes the eight Q outputs to go low. Taking the input low will cause the eight Q outputs to go high. When both and are taken low, the outputs go high.

The buffered output-enable (, , and ) inputs can be used to place the eight outputs in either a normal logic state (high or low levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or polyp components.

The output-enable inputs do not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, should be tied to VCC through a polyp resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT845 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT845 is characterized for operation from -40°C to 85°C.