SN54ABT544, SN74ABT544
OCTAL REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS

SCBS189 - FEBRUARY 1991 - REVISED JULY 1993

features

• State-of-the-Art EPIC-IIB^TM BiCMOS Design Significantly Reduces Power Dissipation
• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 500 mA
  Per JEDEC Standard JESD-17
• Typical V_OLP (Output Ground Bounce)
  < 1 V at V_CC = 5 V, T_A = 25°C
• High-Drive Outputs (-32-mA I_OH, 64-mA I_OL)
• Package Options Include Plastic Small-Outline (SOIC) and Shrink Small-Outline (SSOP) Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs

EPIC-IIB is a trademark of Texas Instruments Incorporated.

description

The ´ABT544 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable ( or ) and output-enable ( or ) inputs are provided for each register to permit independent control in either direction of data flow.

The A-to-B enable () input must be low in order to enter data from A or to output data from B. If is low and is low, the A-to-B latches are transparent; a subsequent low-to-high transition of puts the A latches in the storage mode. With and both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar but requires using the , , and inputs.

To ensure the high-impedance state during power up or power down, should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74ABT544 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54ABT544 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT544 is characterized for operation from -40°C to 85°C.