SN74BCT2574
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS

SCBS255 - SEPTEMBER 1991 - REVISED NOVEMBER 1993

features

• State-of-the-Art BiCMOS Design Significantly Reduces I_CCZ
• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Output Ports Have Equivalent 33- Series Resistors, So No External Resistors Are Required
• Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic 300-mil DIPs (N)

description

This octal edge-triggered D-type flip-flop features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

On the positive transition of the clock (CLK) input, the Q outputs will be set to the logic levels that were set up at the data (D) inputs.

A buffered output-enable () input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

The output enable () does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The outputs, which are designed to source or sink up to 12 mA, include 33- series resistors to reduce overshoot and undershoot.

The SN74BCT2574 is characterized for operation from 0°C to 70°C.