SN54LVTH18640, SN54LVTH182640, SN74LVTH18640, SN74LVTH182640
3.3-V ABT SCAN TEST DEVICES
WITH 18-BIT INVERTING BUS TRANSCEIVERS

SCBS310C - MARCH 1994 - REVISED DECEMBER 1996

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

features

• Members of the Texas Instruments SCOPE^TM Family of Testability Products
• Members of the Texas Instruments Widebus^TM Family
• State-of-the-Art 3.3-V ABT Design Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)
• Support Unregulated Battery Operation Down to 2.7 V
• Bus Hold on Data Inputs Eliminates the Need for External Pullup Resistors
• B-Port Outputs of 'LVTH182640 Devices Have Equivalent 25- Series Resistors, So No External Resistors Are Required
• Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture
• SCOPE^TM Instruction Set
  • IEEE Standard 1149.1-1990 Required Instructions and Optional CLAMP and HIGHZ
  • Parallel-Signature Analysis at Inputs
  • Pseudo-Random Pattern Generation From Outputs
  • Sample Inputs/Toggle Outputs
  • Binary Count From Outputs
  • Device Identification
  • Even-Parity Opcodes
• Packaged in Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Packages

SCOPE and Widebus are trademarks of Texas Instruments Incorporated.

description

The 'LVTH18640 and 'LVTH182640 scan test devices with 18-bit inverting bus transceivers are members of the Texas Instruments SCOPE^TM testability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.

Additionally, these devices are designed specifically for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.

In the normal mode, these devices are 18-bit inverting bus transceivers. They can be used either as two 9-bit transceivers or one 18-bit transceiver. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary-test cells. Activating the TAP in the normal mode does not affect the functional operation of the SCOPE^TM bus transceivers.

Data flow is controlled by the direction-control (DIR) and output-enable () inputs. Data transmission is allowed from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at DIR. The output-enable () can be used to disable the device so that the buses are effectively isolated.

In the test mode, the normal operation of the SCOPE^TM bus transceivers is inhibited and the test circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry performs boundary-scan test operations according to the protocol described in IEEE Standard 1149.1-1990.

Four dedicated test pins observe and control the operation of the test circuitry: test data input (TDI), test data output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry performs other testing functions such as parallel-signature analysis (PSA) on data inputs and pseudo-random pattern generation (PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The B-port outputs of 'LVTH182640, which are designed to source or sink up to 12 mA, include 25- series resistors to reduce overshoot and undershoot.

The SN74LVTH18640 and SN74LVTH182640 are available in TI's shrink small-outline (DL) and thin shrink small-outline (DGG) packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The SN54LVTH18640 and SN54LVTH182640 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LVTH18640 and SN74LVTH182640 are characterized for operation from -40°C to 85°C.