SN54ABT32500, SN74ABT32500
36-BIT UNIVERSAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS

SCBS462 - JUNE 1992-REVISED OCTOBER 1992

features

• Members of the Texas Instruments Widebus+^TM Family
• State-of-the-Art EPIC-IIB ^TM BiCMOS Design Significantly Reduces Power Dissipation
• UBT ^TM (Universal Bus Transceiver) Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode
• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
• Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC = 5 V, T_A = 25°C
• Distributed V_CC and GND Pin Configuration Minimizes High-Speed Switching Noise
• High-Drive Outputs (-32-mA I_OH, 64-mA I_OL)
• Packaged in 100-Pin Plastic Shrink Quad Flat Pack (SQFP) With 14 × 14-mm Package Body Using 0.5-mm Lead Pitch

Widebus+, EPIC-IIB, and UBT are trademarks of Texas Instruments Incorporated.

description

These 36-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.

Data flow in each direction is controlled by output-enable (OEAB and ), latch-enable (LEAB and LEBA), and clock ( and ) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A-bus data is stored in the latch/flip-flop on the high-to-low transition of CLKAB. Output-enable OEAB is active high. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state.

Data flow for B to A is similar to that of A to B but uses , LEBA, and . The output enables are complementary (OEAB is active high, and is active low).

To ensure the high-impedance state during power up or power down, should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver (B to A). OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver (A to B).

Active bus-hold circuitry is provided to hold unused or floating inputs at a valid logic level.

The SN54ABT32500 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT32500 is characterized for operation from -40°C to 85°C.