SN54ABT32374, SN74ABT32374
32-BIT REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS

SCBS463 - JUNE 1992-REVISED OCTOBER 1992

features

• Members of the Texas Instruments Widebus+^TM Family
• State-of-the-Art EPIC-IIB ^TM BiCMOS Design Significantly Reduces Power Dissipation
• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
• Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC = 5 V, T_A = 25°C
• Distributed V_CC and GND Pin Configuration Minimizes High-Speed Switching Noise
• High-Drive Outputs (-32-mA I_OH, 64-mA I_OL)
• Bus-Hold Inputs Eliminate the Need for External Pullup Resistors
• Packaged in 100-Pin Plastic Shrink Quad Flat Pack (SQFP) With 14 × 14-mm Package Body Using 0.5-mm Lead Pitch

  Widebus+ and EPIC-IIB are trademarks of Texas Instruments Incorporated.

  
  

description

The 'ABT32374 is a 32-bit (quad 8-bit) transceiver with edge-triggered D-type flip-flops and 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The 'ABT32374 can be used as four 8-bit flip-flops, two 16-bit flip-flops, or one 32-bit flip-flop. On the positive transition of the clock (CLKAB or CLKBA) input, the B outputs of the flip-flop take on the logic levels set up at the A inputs. The device allows data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the output-enable inputs.

A buffered output-enable ( or OEBA) input can be used to place the 32 outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components.

The output enable ( or OEBA) does not affect the internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver (A to B). OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver (B to A).

Active bus-hold circuitry is provided to hold unused or floating inputs at a valid logic level.

The SN54ABT32374 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT32374 is characterized for operation from -40°C to 85°C.