SN74ALVCH16280
16-BIT TO 32-BIT REGISTERED BUS EXCHANGER
WITH BYTE MASKS AND 3-STATE OUTPUTS

SCES033 - JULY 1995

features

• EPIC^TM (Enhanced-Performance Implanted CMOS) Submicron Process
• Member of the Texas Instruments Widebus^TM Family
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Packaged in Thin Shrink Small-Outline Package

  EPIC and Widebus are trademarks of Texas Instruments Incorporated.

description

This 16-bit to 32-bit registered bus exchanger is designed for 2.3-V to 3.6-V V_CC operation. This device is intended for use in applications where data must be transferred from a narrow high-speed bus to a wide lower-frequency bus.

The device provides synchronous data exchange between the A and B ports. Data is stored in the internal registers on the low-to-high transition of the CLK input. For data transfer in the B to A direction, selects 1B or 2B data for the A outputs.

For data transfer in the A to B direction, a two stage pipeline is provided in the 1B path, and a single storage register in the 2B path. Data flow is controlled by the active-low output enable () and the DIR input. The DIR control pin is registered to synchronize the bus direction changes with the clock.

Two mask bits are provided for both data bytes. The D outputs are controlled by the active-low .

To ensure the high-impedance state during power up or power down, should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH16280 is characterized for operation from -40°C to 85°C.