SN74ALVCH16282
18-BIT TO 36-BIT REGISTERED BUS EXCHANGER
WITH 3-STATE OUTPUTS

SCES036A - JULY 1995 - REVISED AUGUST 1996

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

features

• Member of the Texas Instruments Widebus^TM Family
• EPIC^TM (Enhanced-Performance Implanted CMOS) Sub-Micron Process
• ESD Protection Exceeds 2000 V Per MIL-STD883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Packaged in Thin Shrink Small-Outline Package

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

description

The SNALVCH16282 is an 18-bit to 36-bit registered bus exchanger designed for 2.3-V to 3.6-V V_CC operation. This part is intended for use in applications where data must be transferred from a narrow high-speed bus to a wide lower-frequency bus. It is designed specifically for low-voltage (3.3-V) V_CC operation.

The device provides synchronous data exchange between the two ports. Data is stored in the internal registers on the low-to-high transition of the CLK input. For data transfer in the B-to-A direction, selects 1B or 2B data for the A outputs.

For data transfer in the A-to-B direction, a two-stage pipeline is provided in the 1B path, with a single storage register in the 2B path. Data flow is controlled by the active-low output enable () \and the DIR input. The DIR control pin is registered to synchronize the bus direction changes with the clock.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH16282 is characterized for operation from -40°C to 85°C.