SN74ALVCH16863
18-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS

SCES060 - DECEMBER 1995

features

• Member of the Texas Instruments Widebus^TM Family
• EPIC^TM (Enhanced-Performance Implanted CMOS) Submicron Process
• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF,R = 0)
• Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages

  EPIC and Widebus are trademarks of Texas Instruments Incorporated.

   

description

This 18-bit bus transceiver is designed for 2.3-V to 3.6-V V_CC operation.

The SN74ALVCH16863 is an 18-bit noninverting transceiver designed for synchronous communication between data buses. The control function implementation minimizes external timing requirements.

The SN74ALVCH16863 can be used as two 9-bit transceivers or one 18-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the output-enable ( or ) inputs.

To ensure the high-impedance state during power up or power down, should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH16863 is available in TI's shrink small-outline (DL) and thin shrink small-outline (DGG) packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The SN74ALVCH16863 is characterized for operation from -40°C to 85°C.