SN54ALVTH16373, SN74ALVTH16373
2.5-V/3.3-V 16-BIT TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS

SCES067A - JUNE 1996 - REVISED JULY 1996

features

• Members of the Texas Instruments Widebus^TM Family
• High-Impedance State During Power Up and Power Down
• 5-V I/O Compatible
• High-Drive Capability (-32 mA/64 mA)
• Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC = 3.3 V, T_A = 25°C
• Auto 3-State Eliminates Bus Current Loading When Voltage at the Output Exceeds V_CC
• Bus-Hold Data Inputs Eliminate the Need for External Pullup/Pulldown Resistors
• Power Off Disables Inputs/Outputs, Permitting Live Insertion
• Package Options Include Plastic 300-mil Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV) Packages, and 380-mil Fine-Pitch Ceramic Flat (WD) Package

Widebus is a trademark of Texas Instruments Incorporated.

description

The 'ALVTH16373 are 16-bit transparent D-type latches with 3-state outputs designed for 2.5-V or 3.3-V V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

These devices can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.

A buffered output-enable input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.

does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

When V_CC is between 0 and 1.2 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.2 V, should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74ALVTH16373 is available in TI's thin very small-outline package (DGV), which provides the same I/O pin count and functionality of standard Widebus packages in less than half the printed circuit board area.

The SN54ALVTH16373 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALVTH16373 is characterized for operation from -40°C to 85°C.