SN54ALVTH16500, SN74ALVTH16500
2.5-V/3.3-V 18-BIT UNIVERSAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS

SCES069A - JUNE 1996 - REVISED JULY 1996

features

• Members of the Texas Instruments Widebus^TM Family
• High-Impedance State During Power Up and Power Down
• 5-V I/O Compatible
• High-Drive Outputs (-32 mA/64 mA)
• Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC = 3.3 V, T_A = 25°C
• Auto 3-State Eliminates Bus Current Loading When Voltage at the Output Exceeds V_CC
• Bus-Hold Data Inputs Eliminate the Need for External Pullup/Pulldown Resistors
• Power Off Disables Inputs/Outputs, Permitting Live Insertion
• Package Options Include Plastic 300-mil Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV) Packages, and 380-mil Fine-Pitch Ceramic Flat (WD) Package

Widebus is a trademark of Texas Instruments Incorporated.

description

The 'ALVTH16500 are 18-bit universal bus transceivers designed for 2.5-V or 3.3-V V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.

Data flow in each direction is controlled by output-enable (OEAB and ), latch-enable (LEAB and LEBA), and clock ( and ) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is

high. When LEAB is low, the A data is latched if is held at a high or low logic level. If LEAB is low, the A-bus data is stored in the latch/flip-flop on the high-to-low transition of . Output-enable OEAB is active high. When OEAB is high, the B-port outputs are active. When OEAB is low, the B-port outputs are in the high-impedance state.

Data flow for B to A is similar to that of A to B but uses , LEBA, and . The output enables are complementary (OEAB is active high and is active low).

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

When V_CC is between 0 and 1.2 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.2 V, should be tied to V_CC through a pullup resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.

The SN74ALVTH16500 is available in TI's thin very small-outline package (DGV), which provides the same I/O pin count and functionality of standard Widebus packages in less than half the printed circuit board area.

The SN54ALVTH16500 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALVTH16500 is characterized for operation from -40°C to 85°C.

^[dagger] A-to-B data flow is shown: B-to-A flow is similar but uses , LEBA, and .

^[Dagger] Output level before the indicated steady-state input conditions were established

^§ Output level before the indicated steady-state input conditions were established, provided that was low before LEAB went low