SN74ALVCHG162280
16-BIT TO 32-BIT REGISTERED BUS EXCHANGER
WITH BYTE MASKS AND 3-STATE OUTPUTS

SCES093 - FEBRUARY 1997

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

features

• Member of the Texas Instruments Widebus^TM Family
• EPIC^TM (Enhanced-Performance Implanted CMOS) Sub-Micron Process
• A-Port Outputs Have Equivalent 50- Series Resistors and B-Port Outputs Have Equivalent 20- Series Resistors, So No External Resistors Are Required
• ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
• Bus-Hold On Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Packaged in Thin Shrink Small-Outline Package

Widebus and EPIC are trademarks of Texas Instruments Incorporated.

description

The SN74ALVCHG162280 is a 16-bit to 32-bit registered bus exchanger. This device is intended for use in applications where data must be transferred from a narrow high-speed bus to a wide lower-frequency bus. It is designed specifically for low-voltage (3.3 V) V_CC operation.

The device provides synchronous data exchange between the two ports, A and B. Data is stored in the internal registers on the low-to-high transition of the clock (CLK) input. For data transfer in the B-to-A direction, the select () input selects 1B or 2B data for the A outputs.

For data transfer in the A-to-B direction, a two-stage pipeline is provided in the 1B path, with a single storage register in the 2B path. Data flow is controlled by the active-low output-enable () and direction-control (DIR) input. DIR is registered to synchronize the bus direction changes with the clock.

Two mask bits are provided for both data bytes. The data (D) outputs are controlled by .

The A-port N-channel output transistors are sized at 450 m and the P-channel output transistors are sized at 700 m. All A-port outputs have 50- damping resistors. The B-port N-channel output transistors are sized at 225 m, and the P-channel output transistors are sized at 560 m. All B-port outputs have 20- damping resistors.

To ensure the high-impedance state during power up or power down, should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The switching characteristics are based on a 25-pF (A port) and 80-pF (B and D ports) load, but are tested with the standard 50-pF load.

The SN74ALVCHG162280 is characterized for operation from 0°C to 70°C.