SCLS041B - DECEMBER 1982 - REVISED MAY 1997
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The 'HC595 contain an 8-bit serial-in, parallel-out shift register
that feeds an 8-bit D-type storage register. The storage register has
parallel 3-state outputs. Separate clocks are provided for both the
shift and storage register. The shift register has a direct
overriding clear (
) input, serial
(SER) input, and serial outputs for cascading.
Both the shift register clock (RCLK) and storage register clock (SRCLK) are positive-edge triggered. If both clocks are connected together, the shift register is always one clock pulse ahead of the storage register.
The SN54HC595 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74HC595 is characterized for operation from -40°C to 85°C.