SN54LV273, SN74LV273
OCTAL D-TYPE FLIP-FLOPS
WITH CLEAR

SCLS195B - FEBRUARY 1993 - REVISED APRIL 1996

features

• EPIC^TM (Enhanced-Performance Implanted CMOS) 2-Process
• Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot) > 2 V at V_CC, T_A = 25°C
• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
• Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), Ceramic Flat (W) Packages, Chip Carriers (FK), and (J) 300-mil DIPs

   

description

These octal D-type flip-flops are designed for 2.7-V to 5.5-V V_CC operation.

The 'LV273 are positive-edge-triggered flip-flops with direct clear () input. Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output.

The SN74LV273 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54LV273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LV273 is characterized for operation from -40°C to 85°C.